- Naoya Yokoyama, Kiyofumi Tanaka,
"Container Auto-scaling System Using Sliding-Window Regression with Fuzzy Entropy,"
Journal of Information Processing, Vol.32 pp.916-928, Nov 15, 2024. (Recommended Paper). http://dx.doi.org/10.2197/ipsjjip.32.916
- Yan Chen, Kiyofumi Tanaka,
"High Throughput and Low Bandwidth Demand: Accelerating CNN Inference Block-by-block on FPGAs,"
Proceedings of 27th Euromicro Conference Series on Digital System Design (DSD), pp.503-511, Aug 2024.
https://doi.org/10.1109/dsd64264.2024.00073
- Bowen Tang, Kiyofumi Tanaka,
"An Efficient Real-Time Pitch Correction System via Field-Programmable Gate Array,"
Proceedings of the 2024 6th International Conference on Image, Video and Signal Processing (IVSP '24), Pages 147-154, March 2024. https://doi.org/10.1145/3655755.3655775
- Yan Chen, Kiyofumi Tanaka,
"A Flexible, Fast, Low Bandwidth Block-based Acceleration Architecture for CNN Inference on FPGAs,"
Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, pp.183, Poster presentation, 2024. https://doi.org/10.1145/3626202.3637582
- Naoya Yokoyama, Kiyofumi Tanaka,
"Auto-scaling System Using Fuzzy Entropy for Adapting to Web Traffic Bursting,"(In Japanese)
Multimedia, Distributed, Cooperative, and Mobile Symposium (DICOMO 2023), 14 pages, 2023. (Best Paper Award&Excellent Presentation Award)
- Takaharu Suzuki, Kiyofumi Tanaka,
"Real-time Scheduling Algorithm with Execution Right Delegation for Multiprocessor,"
Journal of Information Processing, Vol.31, pp.67-77, 2023.
- Kentaro Kuribayashi, Yusuke Miyake, Kenji Rikitake, Kiyofumi Tanaka, Yoichi Shinoda,
"Dynamic IoT Applications and Isomorphic IoT Systems Using WebAssembly,"
IEEE 9th World Forum on Internet of Things (WF-IoT 2023), 8 pages, 2023.
- Takaharu Suzuki, Kiyofumi Tanaka,
"A New Scheduling Algorithm for Shortening Response Time of Static Priority Task,"
ECTI Transactions on Computer and Information Technology, Vol.16, No.2, pp.208-221, 2022.
- Takaharu Suzuki, Kiyofumi Tanaka,
"Execution Right Delegation Scheduling Algorithm for Multiprocessor,"
Proc. of IEEE 14th International Symposium on Embedded Multicore/Many-core Systems-On-Chip (MCSoC), pp.46-53, 2021.
- Aye Myat Mon, Kiyofumi Tanaka,
"A New Memory Consistency Model for Real-Time Multicore Processors,"
Proc. of IEEE TENCON 2021, 6 pages, 2021.
- Takaharu Suzuki, Kiyofumi Tanaka,
"Implimentation of ERD-light Scheduling Algorithm on FreeRTOS without Kernel Modification,"
Proc. of Asia Pacific Conference on Robot IoT System Development and Platform (APRIS 2021), pp.29-33, Oneline Conference, 2021.
- Kiyofumi Tanaka, Atsuko Miyaji, Yaoan Jin,
"Efficient FPGA Design of Exception-Free Generic Elliptic Curve Cryptosystems,"
Proc. of 19th International COnference on Applied Cryptography and Network Security (ACNS), LNCS 12726, pp.393-414, 2021.
- Yan Chen, Kiyofumi Tanaka,
"Acceleration of Residual Binarized Neural Network,"
Proc. of the 23rd Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI), pp.126-131, 2021. (Outstanding Paper Award)
- Tetsuo Miyauchi, Kiyofumi Tanaka,
"Solving Slitherlink with FPGA and SMT Solver,"
Journal of Information Processing, Vol.28, pp.959-969, 2020.
- Tetsuo Miyauchi, Kiyofumi Tanaka,
"Building Fine-Grained Configurable ITRON Based RTOS,"
Journal of Information Processing, Vol.28, pp.395-405, 2020.
- Takaharu Suzuki, Kiyofumi Tanaka,
"Response Time Analysis of Execution Right Delegation Scheduling,"
Proc. of Asia Pacific Conference on Robot IoT System Development and Platform (APRIS), pp.32-38, 2020.
- Thiem V. Chu, Kenji Kise, Kiyofumi Tanaka,
"Dependency-Driven Trace-Based Network-on-Chip Emulation on FPGAs,"
Proc. of 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA), pp.211-221, 2020.
- Kiyofumi Tanaka, Atsuko Miyaji,
"Hardware Implementation of Elliptic Curve Scaler Multiplication Algorithms with Side-Channel Protection,"
IPSJ SIG Reports, Vol.2020-EMB-54, 8 pages, 2020. (In Japanese)
- Kiyofumi Tanaka,
"Implementation of Multi-Precision Arithmetic Unit on FPGA SoC,"
IPSJ SIG Reports, Vol.2019-EMB-53, No.42, 5 pages, 2020. (In Japanese)
- Tetsuo Miyauchi, Kiyofumi Tanaka,
"A Proposal of Application Specific Approach with RISC-V Processor on FPGA,"
Proc. of the 22nd Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI), pp.270-273, 2019.
- Duy Doan, Kiyofumi Tanaka,
"Adaptive Local Assignment Algorithm for Scheduling Soft-Aperiodic Tasks on Multiprocessors,"
Proc. of IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA), IEEE Xplore, 6 pages, 2019.
- Jiajun Guo, Amr Ashmawy, Thiem Van Chu, Kiyofumi Tanaka,
"High-Accuracy and Cost-Effective Neural Networks for Embedded Systems,"
IPSJ SIG Technical Reports, Vol.2019-EMB-50, No.36, pp.1-8, 2019.
- Aye Myat Mon, Thiem Van Chu, Kiyofumi Tanaka,
"A Study of Real-Time Extension for RISC-V Processors,"
IPSJ SIG Technical Reports, Vol.2019-EMB-51, No.7, pp.1-2, 2019.
- Duy Doan, Kiyofumi Tanaka,
"Enhanced Virtual Release Advancing Algorithm for Real-Time Task Scheduling,"
Journal of Information and Telecommunication, Vol.2, No.3, pp.246-264, 2018.
- Amr Ashmawy, Kiyofumi Tanaka,
"Reinforcing Total Bandwidth Server with Multivalued WCET,"
Proc. of Asia Pacific Conference on Robot IoT System Development and Platform (APRIS), pp.13-20, 2018.
- Tetsuo Miyauchi, Kiyofumi Tanaka,
"Overview of An Adaptive Approach for Implementing RTOS in Hardware,"
Proc. of Asia Pacific Conference on Robot IoT System Development and Platform (APRIS), pp.40-41, 2018.
- Duy Doan, Kiyofumi Tanaka,
"A Novel Task-to-Processor Assignment Approach for Optimal Multiprocessor Real-time Scheduling,"
Proc. of IEEE 12th International Symposium on Embedded Multicore/Many-core Systems-On-Chip (MCSoC), pp.101-108, 2018. (Best Paper Award)
- Bo-Yu Tseng, Kiyofumi Tanaka,
"Jitter Reduction in Hard Real-Time Systems using Intra-task DVFS Techniques,"
Proc. of 14th Annual Workshop on Operating Systems Platforms for Embedded Real-Time Applications (OSPERT), pp.19-24, 2018.
- Tetsuo Miyauchi, Kiyofumi Tanaka,
"Building a Framework for an Application-Adaptive Processor System on FPGA-based SoC,"
Proc. of the 21st Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI), pp.359-364, 2018.
- Tetsuo Miyauchi, Kiyofumi Tanaka,
"An Adaptive Approach for Implementing RTOS in Hardware,"
Proc. of IPSJ Embedded Systems Symposium (ESS) 2018, pp.44-50, 2018.
- Hiroyuki Kobayashi, Kiyofumi Tanaka,
"Hardware Acceleration for Algorithmic Trading of Financial Products, "
Proc. of IPSJ Embedded Systems Symposium (ESS) 2018, pp.51-58, 2018. (In Japanese)
- Bo-Yu Tseng, Kiyofumi Tanaka,
"Reducing Jitter and Energy in Hard Real-time Systems Using Intra-task DVFS Technique,"
Proc. 80th National Convention of IPSJ, 2 pages, 2018.
- Yuranan Kitrungrotsakul, Kiyofumi Tanaka, Masanobu Hashimoto and Shuichi Onishi,
"Virtual Environment for Developing Real-Time Image Processing for Vehicle Control,"
Proc. of 5th Workshop on Virtual Prototyping of Parallel and Embedded Systems (ViPES),
held with 17th Intl. Conf. on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS), pp.227-232, 2017.
- Duy Doan, Kiyofumi Tanaka,
"An Effective Approach for Improving Responsiveness of Total Bandwidth Server,"
Proc. of 8th Intl. Conf. on Information and Communication Technology for Embedded Systems (IC-ICTES), IEEE Xplore, 6 pages, 2017. (Best Paper Award)
- Duy Doan, Kiyofumi Tanaka,
"Hardware Implementation of Enhanced Virtual Release Advancing Algorithm for Real-Time Task Scheduling,"
Proc. of IEEE Intl. Conf. on Industrial Technology (ICIT), IEEE Xplore, 6 pages, 2017.
- Takaharu Suzuki, Kiyofumi Tanaka,
"Execution Right Delegation: Beyond the Rate Monotonic,"
Proc. of 32nd Intl. Conf. on Computers and Their Applications, pp.185-190, 2017.
- Tetsuo Miyauchi, Kiyofumi Tanaka,
"A Solution to Slitherlink Puzzles Using FPGA,"
Proc. of 32nd Intl. Conf. on Computers and Their Applications, pp.77-83, 2017.
- Tetsuo Miyauchi, Kiyofumi Tanaka,
"A Solution to the Slitherlink Puzzle Using SMT Solver, "
Proc. of The 22nd Game Programming Workshop (GPW) 2017, pp.111-118, 2017. (In Japanese)
- Kiyofumi Tanaka,
"Adaptive Computing Framework in the IoT Era,"
International Conference for Tips for Top and Emerging Computer Scientists (IC-TECS), 2017. (Keynote Speech)
- Takaharu Suzuki, Kiyofumi Tanaka,
"Study on Jitter Reduction by Task Division in Fixed-Priority Based Scheduling,"
Proc. 79th National Convention of IPSJ, 2 pages, 2017. (In Japanese)
- Tetsuo Miyauchi, Kiyofumi Tanaka,
"Study on RTOS Hardware on FPGA,"
Proc. 79th National Convention of IPSJ, 2 pages, 2017. (In Japanese)
- Kazuki Hasegawa, Kiyofumi Tanaka,
"Server Mechanisms for Guaranteeing Schedulability with RTOS Processing and Improving Application Responsiveness by Slack Reclaiming,"
International Journal of Computers and Their Applications, Vol.23, No.2, pp.116-123, 2016.
- Tetsuo Miyauchi, Kiyofumi Tanaka,
"A Framework for Automatic Generation of Application-Specific FPGA-based SoC,"
Proc. of the 20th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI), 6 pages, 2016.
- Duy Doan, Kiyofumi Tanaka,
"Enhanced Virtual Release Advancing for EDF-based Scheduling on Precise Real-Time Systems,"
Proc. of the Eighth IEEE International Conference on Knowledge and Systems Engineering (KSE2016), pp.43--48, 2016.
- Tetsuo Miyauchi, Kiyofumi Tanaka,
"Configuration Technique for Adaptability of Multicore Processors on FPGA,"
Proc. of the 27th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2 pages, pp.219-220, 2016.
- Kiyofumi Tanaka, Kazuki Hasegawa,
"Guaranteeing Schedulability with Server Mechanisms for RTOS Processing and Utilizing Server Slack,"
Proc. of 31st International Conference on Computers and Their Applications (CATA), pp.359-364, 2016.
- Tetsuo Miyauchi, Kiyofumi Tanaka,
"Fine-Grained Configuration of RTOS Adapted to Applications,"
Proc. of IPSJ Embedded Systems Symposium (ESS) 2016, pp.73-81, 2016. (In Japanese)
- Takaharu Suzuki, Kiyofumi Tanaka,
"A Virtual Server for Shortening Task Response Time,"
Proc. of IPSJ Embedded Systems Symposium (ESS) 2016, pp.37-46, 2016. (Incentive Award) (In Japanese)
- KITRUNGROTSAKUL Yuranan, CHETPRAYOON Panumate, Hiroyuki Iida, Kiyofumi Tanaka,
"Measuring Sophistication of Sports Games: The First Result from Baseball,"
IPSJ SIG Technical Reports, Vol.2016-GI-36, No.4, pp.1-6, 2016.
- Takaharu Suzuki, Kiyofumi Tanaka,
"Scheduling Algorithm with Execution Right Transfer Utilizing Slack,"
Proc. 78th National Convention of IPSJ, 2 pages, 2016. (In Japanese)
- Keiichi Morimoto, Kiyofumi Tanaka,
"Adaptive Real-Time Scheduling with Estimation of Execution Times,"
Proc. 78th National Convention of IPSJ, 2 pages, 2016. (In Japanese)
- Tetsuo Miyauchi, Kiyofumi Tanaka,
"Adaptation Method for Cache Memories in FPGA Soft Processors,"
Proc. 78th National Convention of IPSJ, 2 pages, 2016. (In Japanese)
- Kiyofumi Tanaka,
"Virtual Release Advancing for Earlier Deadlines,"
ACM SIGBED Review, Vol.12, No.3, pp.28--31, 2015.
- Kiyofumi Tanaka,
"Real-Time Scheduling for Reducing Jitters of Periodic Tasks,"
Journal of Information Processing, Vol.23, No.5, pp.542-552, 2015.
- Marios Sioutis, Kiyofumi Tanaka, Yuuto Lim and Yasuo Tan,
"Towards Resilient Services in the Home: A Home Service Platform with Support for Conflict Resolution,"
Proc. of 7th International Conference on Ambient Assisted Living (IWAAL), LNCS 9455, pp.113-124, 2015.
- Kiyofumi Tanaka and Kazuki Hasegawa,
"Guaranteeing Schedulability with Server Mechanisms for RTOS Overhead,"
Proc. of 5th Embedded Operating Systems Workshop (EWiLi), 2 pages, 2015.
- Kiyofumi Tanaka,
"Virtual Release Advancing for Earlier Deadlines,"
Proc. of 7th Workshop on Adaptive and Reconfigurable Embedded Systems (APRES), pp.16-19, 2015.
- Tetsuo Miyauchi, Kiyofumi Tanaka,
"Building Automatic Optimizing Environment for Multicore Processors,"
Proc. of IPSJ Embedded Systems Symposium (ESS) 2015, pp.99-104, 2015. (In Japanese)
- Kazuki Hasegawa, Kiyofumi Tanaka,
"Real-Time Scheduling Considering RTOS Overhead,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2015, 1 page, 2015. (In Japanese)
- Keiichi Morimoto, Kiyofumi Tanaka,
"Estimating Execution Times of Embedded Applications,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2015, 1 page, 2015. (In Japanese)
- Tetsuo Miyauchi, Kiyofumi Tanaka,
"Implementation of Multicore Processors by Automatic Optimization for FPGA,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2015, 1 page, 2015. (In Japanese)
- Tetsuo Miyauchi, Kiyofumi Tanaka,
"Automatic Optimization Configurator for FPGA Soft Processors,"
Proc. 77th National Convention of IPSJ, 2 pages, 2015. (In Japanese)
- Kiyofumi Tanaka,
"Virtual Release Advancing Applied to Aperiodic Tasks,"
IPSJ SIG Technical Reports, Vol.2015-EMB-36, No.6, pp.1-6, 2015. (In Japanese)
- Kiyofumi Tanaka,
"Improvement of Adaptive EDF,"
ACM SIGBED Review, Vol.11, No.3, pp.40-43, October 2014.
- Kiyofumi Tanaka,
"A Method of Shortening Average Response Times by Adaptive Scheduling – Effects of Estimating Execution Times -,"
IPSJ Journal, Vol55, No.8, pp.1856-1865, 2014. (In Japanese)
- Kiyofumi Tanaka,
"Adaptive Real-Time Scheduling for Soft Tasks with Varying Execution Times,"
Journal of Information Processing, Vol.22, No.2, pp.152-159, 2014.
- Kiyofumi Tanaka,
"Improvement of Adaptive EDF,"
Proc. of 6th Workshop on Adaptive and Reconfigurable Embedded Systems (APRES), 4 pages, 2014.
- Kiyofumi Tanaka,
"Considering RTOS Overheads in Real-Time Processing,"
International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems (IWIA), 4 pages, 2014.
- Kiyofumi Tanaka,
"Real-Time Scheduling for Reducing Jitters of Periodic Tasks,"
Proc. of IPSJ Embedded Systems Symposium (ESS) 2014, pp.36-45, 2014. (Best Paper Award) (In Japanese)
- Kiyofumi Tanaka,
"Real-Time Scheduling for Shortening Response Times of Important Tasks,"
IPSJ SIG Technical Reports, Vol.2014-EMB-32, No.2, 6 pages, 2014. (In Japanese)
- Fengxiang Xie, Kiyofumi Tanaka,
"JAIST23-Pro: Design of Multicore Processors for FPGA,"
IPSJ SIG Technical Reports, Vol.2014-ARC-208, No.7, 2014. (IPSJ Computer Science Research Award for Young Scientists) (In Japanese)
- Kiyofumi Tanaka,
"Adaptive EDF: Using Predictive Execution Time,"
ACM SIGBED Review, Vol.10, No.4, pp.41-44, 2013.
- Kazutaka Nakamura, Kiyofumi Tanaka, Yasushi Hibino,
"Systems on Abstract Network,"
Proc. of International Conference on Software Engineering Research & Practice (SERP), pp.117-123, 2013.
- Kiyofumi Tanaka,
"Adaptive Total Bandwidth Server: Using Predictive Execution Time,"
Proc. of 4th IFIP TC 10 International Embedded Systems Symposium (IESS)
(Springer, IFIP Advances in Information and Communication Technology 403), pp.250-261, 2013.
- Kiyofumi Tanaka,
"Adaptive EDF: Using Predictive Execution Time,"
Proc. of 5th Workshop on Adaptive and Reconfigurable Embedded Systems (APRES), pp.2-5, 2013.
- Kiyofumi Tanaka,
"A Method of Shortening Average Response Times by Adaptive Scheduling – Effects of Estimating Execution Times -,"
Proc. of IPSJ Embedded Systems Symposium (ESS) 2013, pp.87-94, 2013. (Best Paper Award) (In Japanese)
- Kiyofumi Tanaka,
"A Method of Estimating Tasks' Execution Times for Adaptive Real-Time Scheduling,"
IPSJ SIG Technical Reports, Vol.2013-EMB-29, No.9, 8 pages, 2013. (In Japanese)
- Kiyofumi Tanaka,
"Real-Time Scheduling by Exploiting Fluctuation in Execution Time,"
IPSJ SIG Technical Reports, Vol.2013-EMB-28, No.25, 6 pages, 2013. (In Japanese)
- Hitoki Itoh, Kiyofumi Tanaka,
"A Hardware/Software Co-Design Method for Java Virtual Machine Oriented to High-Level Synthesis,"
Proc. of International Conference on Embedded Systems and Applications (ESA), pp.131-135, 2012.
- Masaya Kunimoto, Hideaki Yanagisawa, Kiyofumi Tanaka and Yasuhiro Takayama,
"Design of a Low Power Processor for a Surveillance System Using FPGA,"
Proc. of the 18th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS) 2012 Work-in-Progress (WiP) Proceedings, pp.41-44, 2012.
- Kiyofumi Tanaka,
"Efficient Block Placement for Hierarchical Cache Systems,"
Proc. of IEEE International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems (IWIA), pp.47-54, 2012.
- Tomoaki Ukezono, Yoshimune Saitoh, Kiyofumi Tanaka,
"Highly Accurate Cache Block Replacement for ZCache in Embedded Processors,"
Proc. of Symposium on Advanced Computing Systems and Infrastructures (SACSIS) 2012, pp.124-132, 2012. (In Japanese)
- Hitoki Ito, Kiyofumi Tanaka,
"A Resource Sharing Method for Reconfigurable Systems with Java Virtual Machine: Programming in Instantiation,"
IPSJ SIG Technical Reports, Vol.2012-SLDM-158, No.1, 5 pages, 2012. (In Japanese)
- Takayuki Hiroyama, Tomoaki Ukezono, Kiyofumi Tanaka,
"Proposal of Proper Placement Analysis of Cache Blocks,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2012, 1 page, 2012. (In Japanese)
- Aotong Yin, Kiyofumi Tanaka,
"Feasibility of Real-Time Scheduling Algorithms in ITRON Environments,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2012, 1 page, 2012.
- Tomoaki Ukezono, Kiyofumi Tanaka,
"Cache Fill Control Method for Embedded Processors,"
IPSJ Journal, Vol.52, No.12 pp.3160-3171, 2011. (In Japanese)
- Tomoaki Ukezono, Kiyofumi Tanaka,
"Reduction of Misses in Instruction Caches by Reindexing,"
Proc. of IPSJ Embedded Systems Symposium (ESS) 2011, pp.13-1-13-8, 2011. (In Japanese)
- Hitoki Ito, Kiyofumi Tanaka,
"Hardware/Software Co-Design Method Optimized for High-Level Synthesis -Application to Android Platforms-,"
IEICE Technical Report, VLD, Vol.2011-70, No.324, pp.109-113, 2011. (In Japanese)
- Tomoaki Ukezono, Yuanzhe Liu, Kiyofumi Tanaka,
"Inhibiting Fluctuation of Execution Time of Real Time Tasks using Tightly Coupled Memory,"
IEICE Technical Report, CPSY, Vol.111, No.328, CPSY2011-53, pp.59-64, 2011. (In Japanese)
- Yuanzhe Liu, Tomoaki Ukezono, Kiyofumi Tanaka,
"Study on Usage of Tightly-Coupled Memory for Real-Time Processing,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2011, 1 page, 2011. (In Japanese)
- Tomoaki Ukezono, Kiyofumi Tanaka,
"Reduction of Leakage Energy in Low Level Caches,"
Proc. of Workshop on Low Power System on Chip, conjunction with International Green Computing Conference, pp.537-544, 2010.
- Tomoaki Ukezono, Kiyofumi Tanaka,
"Cache Fill Control Method for Embedded Processors,"
Proc. of IPSJ Embedded Systems Symposium (ESS) 2010, Vol.2010, No.10, pp.81-86, 2010. (In Japanese)
- Tomoaki Ukezono, Kiyofumi Tanaka,
"Use of Dynamic Optimization System for Energy Reduction,"
Proc. of Symposium on Advanced Computing Systems and Infrastructures (SACSIS) 2010, Vol.2010, No.5, pp.259-266, 2010. (In Japanese)
- Tomoaki Ukezono, Kiyofumi Tanaka,
"Considerations of Data Cache Control Method for Embedded Processors,"
IPSJ SIG Technical Reports, Vol.2010-ARC-191, 7 pages, 2010. (In Japanese)
- Masaya Kunimoto, Kiyofumi Tanaka, Hideaki Yanagisawa,
"Proposal of Energy Reduction Techniques by Switching Instruction Execution Pipelines,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2010, 1 page, 2010. (In Japanese)
- Huh, Younsuk, Kiyofumi Tanaka,
"Efficient Block Allocation Method in Hierarchical Cache Systems,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2010, 1 page, 2010. (In Japanese)
- Tomoaki Ukezono, Kiyofumi Tanaka,
"A Technique for Reducing Data Prefetch Hardware Using Binary Translation,"
IPSJ Transactions on Advanced Computing Systems, Vol.2, No.4, pp.1-14, 2009. (In Japanese)
- Mary Ann Mooradian, Kiyofumi Tanaka,
"Authorship Guidelines for Japanese Research Environments,"
Proc. of 2009 Research Conference on Research Integrity, pp.30, 2009.
- Kiyofumi Tanaka, Hiroki Zushi,
"An Energy-Aware Operating System and Software Development Environment for Embedded Systems,"
International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems (IWIA), 2009.
- Takashi Sakiyama, Kiyofumi Tanaka,
"Optimization of Binary Codes Based on Task Priorities,"
Proc. of IPSJ Embedded Systems Symposium (ESS) 2009, Vol.2009, No.10, pp.127-132, 2009. (In Japanese)
- Toshiharu Imai, Kiyofumi Tanaka,
"Push Prefetching by Memory Controllers with Effective Utilization of Memory Busses,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2009, 1 page, 2009. (In Japanese)
- Akito Iwanaga, Kiyofumi Tanaka, Hideaki Yanagisawa,
"Implementation of Shared Memory Multicore Processors on FPGA,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2009, 1 page, 2009. (In Japanese)
- Yasuhito Ito, Kiyofumi Tanaka,
"Operating Systems Supporting Energy Reduction in Calculation Units,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2009, 1 page, 2009. (In Japanese)
- Nobuhiro Sato, Kiyofumi Tanaka,
"A Method of Dividing Shared Caches in Multicore Processors,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2009, 1 page, 2009. (In Japanese)
- Motomi Aoki, Kiyofumi Tanaka,
"Power-Saving Java VM Using Software Self-Invalidation,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2009, 1 page, 2009. (In Japanese)
- Tomoaki Ukezono, Kiyofumi Tanaka,
"Dynamic Binary Code Translation for Data Prefetch Optimization,"
Proc. of IEEE 2008 International Symposium on Frontiers in Computer Architecture Design (FCAD'08)
held with Asia-Pacific Computer Systems Architecture Conference (ACSAC), pp.237-244, 2008.
- Tomoaki Ukezono, Kiyofumi Tanaka,
"HDOS: An Infrastructure for Dynamic Optimization,"
Proc. of International Conference on Parallel & Distributed Processing Techniques & Applications (PDPTA), pp.33-39, 2008.
- Kiyofumi Tanaka, Kouhei Hayashi,
"Automatic Generation of Optimal Binary Codes for Real-Time Embedded Systems,"
Proc. of International Conference on Embedded Systems and Applications (ESA), pp.268-273, 2008.
- Kiyofumi Tanaka, Junji Yamano,
"Automatic Application of Last-Touch Instructions for Leakage Energy Reduction,"
Proc. of IEEE International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems (IWIA), pp. 43-50, 2008.
- Tomoaki Ukezono, Kiyofumi Tanaka,
"A Binary Code Translation Technique for Data Prefetch Optimization,"
Proc. of Symposium on Advanced Computing Systems and Infrastructures (SACSIS) 2008, Vol.2008, No.5, pp.187-194, 2008. (In Japanese)
- Le Kieu Nhu, Kiyofumi Tanaka,
"Effectiveness of Energy-Reduction Methods for Cache Memories Using Data Compression,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2008, 1 page, 2008. (In Japanese)
- Yusuke Manabe, Kiyofumi Tanaka,
"Energy Reduction in Cache Memories with Dynamical Application of Self-Invalidation,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2008, 1 page, 2008. (In Japanese)
- Hiroki Zushi, Kiyofumi Tanaka,
"Embedded OS Supporting Energy Reduction,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2008, 1 page, 2008. (In Japanese)
- Kiyofumi Tanaka, Takahiro Kawahara,
"Leakage Energy Reduction in Cache Memory by Data Compression,"
ACM Computer Architecture News, Vol.35, No.5, pp.17-24, 2007.
- Hitoshi Tanimura, Kiyofumi Tanaka,
"Development of Equipment for Communication beyond IT Areas,"
Proc. of Malaysia-Japan International Symposium on Advanced Technology, 6 pages, 2007.
- Kiyofumi Tanaka, Takenori Fujita,
"Leakage Energy Reduction in Cache Memory by Software Self-Invalidation,"
Proc. of 12th Asia-Pacific Computer Systems Architecture Conference, ACSAC, LNCS 4697, pp.163-174, 2007.
- Kiyofumi Tanaka, Takahiro Kawahara,
"Leakage Energy Reduction in Cache Memories by Data Compression,"
Proc. of 2nd International Workshop on Advanced Low Power Systems (ALPS), pp.23-30, 2007.
- Kiyofumi Tanaka,
"Cache Memory Architecture for Leakage Energy Reduction,"
Proc. of IEEE International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems (IWIA), pp.73-80, 2007.
- Tomoaki Ukezono, Kiyofumi Tanaka,
"A Technique for Sequential Data Prefetch Using Dynamic Code Optimization Systems,"
IPSJ SIG Technical Reports, ARC, Vol.2007, No.115, pp.39-44, 2007. (In Japanese)
- Junji Yamano, Kiyofumi Tanaka,
"Application Method of Self-Invalidation Instructions for Energy Reduction in Cache Memories,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2007, 1 page, 2007. (In Japanese)
- Kouhei Hayashi, Kiyofumi Tanaka,
"Study on Implementation of Embedded Real-Time Database Libraries,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2007, 1 page, 2007. (In Japanese)
- Takashi Sasayama, Kiyofumi Tanaka,
"A Method of Binary Construction Based on Static Task Priorities,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2007, 1 page, 2007. (In Japanese)
- Shunsuke Kawamura, Kiyofumi Tanaka,
"Compression Hardware for Energy Reduction in Cache Memories,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2007, 1 page, 2007. (In Japanese)
- Masato Kawahata, Kiyofumi Tanaka,
"Evaluation of Energy Reduction Techniques for Cache Memories Considering Behaviors of Data References,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2007, 1 page, 2007. (In Japanese)
- Kiyofumi Tanaka, Aiko Matsuda,
"Static Energy Reduction in Cache Memories Using Data Compression,"
Proc. of IEEE TENCON, 4 pages, 2006.
- Kiyofumi Tanaka, Akira Imai,
"Adaptive Dynamic Voltage Scaling for Real-Time Systems,"
Proc. of International Conference on Embedded Systems and Applications (ESA), pp.72-78, 2006.
- Toshiharu Imai, Kiyofumi Tanaka,
"The Concept of Memory-based Thread Execution by Highly Functional Memory Controller,"
Proc. of International Conference on Parallel & Distributed Processing Techniques & Applications (PDPTA), pp.506-512, 2006.
- Kiyofumi Tanaka,
"Real-Time Operating System Kernel for Multithreaded Processor,"
Proc. of IEEE International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems (IWIA), pp. 91-99, 2006.
- Toshiharu Imai, Kiyofumi Tanaka,
"Study on Improvement of Bus Utilization Ratio with Highly Functional Memory Controllers,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2006, 1 page, 2006. (In Japanese)
- Tomoaki Ukezono, Kiyofumi Tanaka,
"Study on Register Re-Allocation Algorithms for Software Traces,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2006, 1 page, 2006. (In Japanese)
- Takenori Fujita, Kiyofumi Tanaka,
"Energy Reduction Techniques for Cache Memories with Self-Invalidation,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2006, 1 page, 2006. (In Japanese)
- Takahiro Kawahara, Kiyofumi Tanaka,
"Cache Block Compression Algorithms for Reducing Energy Consumption,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2006, 1 page, 2006. (In Japanese)
- Masato Kawahata, Kiyofumi Tanaka,
"Energy Reduction in Cache Memories Considering Behaviors of Data References,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2006, 1 page, 2006. (In Japanese)
- Tomohisa Ishikawa, Kiyofumi Tanaka,
"Distributed Real-Time Scheduling for Asymmetric Multiprocessors,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2006, 1 page, 2006. (In Japanese)
- Tomoaki Ukezono, Kiyofumi Tanaka,
"Preliminary Evaluation for Dynamic Optimization by Software Trace,"
IPSJ SIG Technical Reports, ARC, Vol.2006, No.88, pp.169-174, 2006. (In Japanese)
- Kiyofumi Tanaka,
"Casablanca II: Implementation of a Real-Time RISC Core for Embedded Systems,"
Proc. of IEEE International Conference on Application-Specific Systems, Architecture, and Processors (ASAP), pp.36-42, 2005.
- Kiyofumi Tanaka,
"Real-Time Adaptive Task Scheduling,"
Proc. of International Conference on Embedded Systems and Applications (ESA), pp.24-30, 2005.
- Kiyofumi Tanaka,
"PRESTOR-1: A Processor Extending Multithreaded Architecture,"
Proc. of IEEE International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems (IWIA), pp.91-98, 2005.
- Tomoaki Ukezono, Kiyofumi Tanaka,
"Dynamic Binary Optimization Using Hardware Analysis System,"
IPSJ SIG Technical Reports, ARC, Vol.2005, No.120, pp.7-12, 2005. (In Japanese)
- Toshiharu Imai, Kiyofumi Tanaka,
"Evaluation of Reconfigurable and Highly Functional Memory Controller,"
IEICE Technical Report, RECONF, Vol.105, No.452, pp.19-24, 2005. (In Japanese)
- Asahito Shioyasu, Kiyofumi Tanaka,
"Cache Block Replacement Based on Time Information,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2005, 1 page, 2005. (In Japanese)
- Akihiko Ozaki, Kiyofumi Tanaka,
"Study on Performance Metrics for Embedded OS,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2005, 1 page, 2005. (In Japanese)
- Akira Imai, Kiyofumi Tanaka,
"DVS Control Hardware Utilizing Real-Time Scheduling Information,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2005, 1 page, 2005. (In Japanese)
- Aiko Matsuda, Kiyofumi Tanaka,
"Energy Reduction Techniques for Cache Memories Utilizing Data Compression,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2005, 1 page, 2005. (In Japanese)
- Akinori Takeuchi, Kiyofumi Tanaka,
"Asymmetric Parallel Execution with Memory Controllers,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2005, 1 page, 2005. (In Japanese)
- Toshiharu Imai, Kiyofumi Tanaka,
"Load Distribution Techniques by Highly Functional Memory Controllers,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2005, 1 page, 2005. (In Japanese)
- Tomoaki Ukezono, Kiyofumi Tanaka,
"Hardware Analysis Systems for Dynamic Optimization of Binary Codes,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2005, 1 page, 2005. (In Japanese)
- Jun Miyazaki, Tomoharu Fukawa, Kiyofumi Tanaka,
"Evaluation of Query Processing Using Stride Data Access in a Main Memory Database,"
The Database Society of Japan Letters, Vol.3, No.2, pp.41-44, 2004. (In Japanese)
- Tatsuya Yamamoto, Kiyofumi Tanaka,
"Area Efficient Wave-Pipelined Adder Using Redundant Binary Encoding,"
Proc. of the Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI), pp.327-332, 2004.
- Kiyofumi Tanaka, Toshihide Hagiwara,
"A Scalable and Adaptive Directory Scheme for Hardware Distributed Shared Memory,"
Proc. of 9th Asia-Pacific Computer Systems Architecture Conference (ACSAC), LNCS 3189, pp.539-553, 2004.
- Kiyofumi Tanaka, Tomoharu Fukawa,
"Highly Functional Memory Architecture for Large-Scale Data Applications,"
Proc. of IEEE International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems (IWIA), pp.109-118, 2004.
- Toshiharu Imai, Kiyofumi Tanaka,
"Highly Functional Memory Controller Supporting High-Speed Filtering,"
IPSJ SIG Technical Reports, ARC, Vol.2004, No.123, pp.89-94, 2004. (In Japanese)
- Ayahiko Takahashi, Kiyofumi Tanaka,
"Reconfigurable Cache Memories for Real-Time Data Applications,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2004, 1 page, 2004. (In Japanese)
- Nobuyuki Shimada, Kiyofumi Tanaka,
"Implementation of RTOS Cooperating with Speed-Up Mechanisms of Embedded Processors,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2004, 1 page, 2004. (In Japanese)
- Yousuke Nanri, Kiyofumi Tanaka,
"Acceleration of Generalized Harmonic Analysis with FPGA,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2004, 1 page, 2004. (In Japanese)
- Kengo Ueda, Kiyofumi Tanaka,
"Enhanced Multithreaded Architecture with Context Buffers,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2004, 1 page, 2004. (In Japanese)
- Mitsuru Morita, Kiyofumi Tanaka,
"A Technique for Reducing Cache Misses Based on Access Frequency,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2004, 1 page, 2004. (In Japanese)
- Toshiharu Imai, Kiyofumi Tanaka,
"High-Speed Filtering by Memory Controllers with MAC Engines,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2004, 1 page, 2004. (In Japanese)
- Jun Miyazaki, Tomoharu Fukawa, Kiyofumi Tanaka,
"Evaluation of Query Processing Using Stride Data Access in a Main Memory Database,"
IPSJ SIG Technical Reports, Vol.2004-DBS-134, No.48, pp.361-367, 2004. (In Japanese)
- Kiyofumi Tanaka,
"Fast Context Switching by Hierarchical Task Allocation and Reconfigurable Cache,"
Proc. of IEEE International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems (IWIA), pp.20-29, 2003.
- Kiyofumi Tanaka, Kazumichi Kuritani,
"Task Scheduling with Adaptive and Dynamic Priority,"
Proc. of Embedded Software Symposium 2003, Vol.2003, No.13, pp.56-63, 2003. (In Japanese)
- Tatsuya Yamamoto, Kiyofumi Tanaka,
"A Wave-Pipelined Fast MAC Design Using Redundant Binary Representation,"
IPSJ SIG Technical Reports, ARC, Vol.2003, No.155, pp.33-38, 2003. (In Japanese)
- Hisashi Baba, Kiyofumi Tanaka,
"Adaptive and Dynamic Scheduling for Distributed Real-Time Systems,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2003, pp.229, 2003. (In Japanese)
- Tetsuya Osaki, Kiyofumi Tanaka,
"Proposal of Highly Functional Interrupt Controllers for Supporting Real-Time Processing,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2003, pp.228, 2003. (In Japanese)
- Koshimae, Kiyofumi Tanaka,
"Proposal of Cache Memories Exploiting Data-Dependency For Supporting Speculative Thread Execution,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2003, pp.227, 2003. (In Japanese)
- Hiroshi Yoshikane, Kiyofumi Tanaka,
"Proposal of JAVA Acceleration Techniques with Lightweight Hardware,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2003, pp.223, 2003. (In Japanese)
- Tatsuya Yamamoto, Kiyofumi Tanaka,
"Proposal of Fast Redundant Binary MAC Units by Wave-Pipelining,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2003, pp.222, 2003. (In Japanese)
- Kazumichi Kuritani, Kiyofumi Tanaka,
"Evaluation of Adaptive Scheduling for RTOS,"
IPSJ SIG Technical Reports, HPC, Vol.2003, No.27, pp.137-142, 2003. (In Japanese)
- Toshihide Hagiwara, Kiyofumi Tanaka,
"Quantitative Evaluation of Adaptive Directory in Distributed Shared Memory,"
IPSJ SIG Technical Reports, ARC, Vol.2003, No.27, pp.25-30, 2003. (In Japanese)
- Khairuddin bin Khalid, Kiyofumi Tanaka,
"Evaluation of Cache Memory as FIFO Buffer,"
IPSJ SIG Technical Reports, ARC, Vol.2003, No.27, pp.91-96, 2003.
- Tomoharu Fukawa, Kiyofumi Tanaka, Jun Miyazaki,
"Evaluation of Highly Functional Memory Controller for Main Memory Database,"
IPSJ SIG Technical Reports, ARC, Vol.2003, No.27, pp.85-90, 2003. (In Japanese)
- Kazumichi Kuritani, Kiyofumi Tanaka,
"Adaptive Scheduling for Real-Time OS,"
IEICE Technical Report, CPSY, Vol.102, No.478, pp.127-132, 2002. (In Japanese)
- Toshihide Hagiwara, Kiyofumi Tanaka,
"Cache Coherence Management by Adaptive Directory,"
IEICE Technical Report, CPSY, Vol.102, No.478, pp.61-66, 2002. (In Japanese)
- Tomoaki Ukezono, Kiyofumi Tanaka,
"TLB Preloading by Linear Page Address Prediction,"
IPSJ SIG Technical Reports, ARC, Vol.2002, No.150, pp.71-76, 2002. (In Japanese)
- Khairuddin bin Khalid, Kiyofumi Tanaka,
"Implementation of FIFO Buffer Using Cache Memory,"
IPSJ SIG Technical Reports, ARC, Vol.2002, No.150, pp.83-88, 2002.
- Tomoharu Fukawa, Kiyofumi Tanaka, Jun Miyazaki,
"Highly Functional Memory Controller for Main Memory Database,"
IPSJ SIG Technical Reports, ARC, Vol.2002, No.150, pp.77-82, 2002. (In Japanese)
- Kazumichi Kuritani, Kiyofumi Tanaka,
"Dynamic Scheduling for Periodic Tasks,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2002, pp.235, 2002. (In Japanese)
- Tomoaki Ukezono, Kiyofumi Tanaka,
"TLB Preloading with Linear Page Address Prediction,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2002, pp.234, 2002. (In Japanese)
- Tomoharu Fukawa, Kiyofumi Tanaka, Jun Miyazaki,
"Proposal of Data Transfer Techniques for MMDB,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2002, pp.239, 2002. (In Japanese)
- Toshihide Hagiwara, Kiyofumi Tanaka,
"Adaptive Directory Schemes for Distributed Shared Memory,"
Proc. Joint conference of Hokuriku chapters of Electrical and information Societies 2002, pp.258, 2002. (In Japanese)
- Kiyofumi Tanaka,
"Development of Open-Source Libraries for Supporting Development of Embedded Systems,"
Information-technology Promotion Agency, Japan (IPA) H13 Collection of Outcome Papers, CD-ROM, 2002. (In Japanese)
- Kiyofumi Tanaka, Takashi Matsumoto,
"Casablanca: A Real-Time RISC Core for Embedded Systems,"
Proc. of International Conference on Advances in Infrastructure for Electronic Business, Science, and Education on the Internet, 8 pages, 2001.
- Kiyofumi Tanaka,
"Development of Embedded RISC Core Libraries for Supporting Real-Time Control,"
Information-technology Promotion Agency, Japan (IPA) H12 Collection of Outcome Papers, 2nd ed., CD-ROM, 2001 (In Japanese)
- Kiyofumi Tanaka, Takashi Matsumoto, Kei Hiraki,
"On Scalability Issue of Directory Schemes of Hardware Distributed Shared Memory,"
Proc. of the Nineth Workshop on Scalable Shared Memory Multiprocessors, 1 page, 2000.
- Kiyofumi Tanaka, Takashi Matsumoto,
"Evaluation of Realtime RISC Core Casablanca,"
IEICE Technical Report, CPSY Vol.100, No.248, pp.25-32, 2000. (In Japanese)
- Kiyofumi Tanaka, Takashi Matsumoto, Kei Hiraki,
"Quantitative Evaluation of Scalable Directory Schemes in Hardware Distributed Shared Memory,"
IPSJ SIG Technical Reports, ARC, Vol.2000, No.74, pp.7-12, 2000. (In Japanese)
- Kiyofumi Tanaka, Takashi Matsumoto, Kei Hiraki,
"Lightweight Hardware Distributed Shared Memory,"
Transactions of Information Processing Society of Japan, Vol.40, No.5, pp.2025-2036, 1999. (In Japanese)
- Kiyofumi Tanaka, Takashi Matsumoto, Kei Hiraki,
"Lightweight Hardware Distributed Shared Memory Supported by Generalized Combining,"
Proc. of the 5th International Symposium on High-Performance Computer Architecture (HPCA), pp.90-99, 1999.
- Kiyofumi Tanaka, Takashi Matsumoto, Kei Hiraki,
"Casablanca : Design and Implementation of Realtime RISC Core,"
IPSJ SIG Technical Reports, ARC, Vol.99, No.100, pp.51-56, 1999. (In Japanese)
- Kiyofumi Tanaka, Takashi Matsumoto, Kei Hiraki,
"Performance Evaluation of Parallel Computer Prototype OCHANOMIZ-5,"
IEICE Technical Report, CPSY 48 - 59, Vol.98, No.233, pp.31-38, 1998. (In Japanese)
- Kiyofumi Tanaka, Takashi Matsumoto, Jun Tsuiki, Kei Hiraki,
"Distributed Shared Memory of OCHANOMIZ-5,"
Proc. 56th National Convention of IPSJ (1), pp.155-156, 1998. (In Japanese)
- Kiyofumi Tanaka, Takashi Matsumoto, Jun Tsuiki, Kei Hiraki,
"Low Cost Hardware Distributed Shared Memory,"
IPSJ SIG Technical Reports, ARC Vol.97, No.102, pp.79-84, 1997. (In Japanese)
- Kiyofumi Tanaka, Takashi Matsumoto, Jun Tsuiki, Kei Hiraki,
"Performance Evaluation of Generalized Combining,"
IPSJ SIG Technical Reports, ARC, Vol.97, No.76, pp.179-184, 1997. (In Japanese)
- Jun Tsuiki, Kiyofumi Tanaka, Takashi Matsumoto, Kei Hiraki,
"Implementation of Distributed Shared Memory with Low Cost Hardware : OCHANOMIZ 5,"
IEICE Technical Report, CPSY 96 - 53, Vol.96, No.230, pp.55-62, 1996. (In Japanese)
- Kiyofumi Tanaka, Jun Tsuiki, Takashi Matsumoto, Kei Hiraki,
"Preliminary Performance Evaluation of General Purpose Parallel Computer Prototype OCHANOMIZ-5,"
IEICE Technical Report, CPSY 96 - 53, Vol.96, No.230, pp.47-54, 1996. (In Japanese)
- Kiyofumi Tanaka, Takashi Matsumoto, Jun Tsuiki, Kei Hiraki,
"Generalized Combining,"
IPSJ SIG Technical Reports, ARC, Vol.96, No.13, pp.31-36, 1996. (In Japanese)
- Kiyofumi Tanaka, Jun Tsuiki, Takashi Matsumoto, Kei Hiraki,
"OCHANOMIZ-5: Parallel Computer Prototype,"
Proc. of 3rd FPGA/PLD Design Conference & Exhibit, pp.505-514, 1995.
- Jun Tsuiki, Kiyofumi Tanaka, Takashi Matsumoto, Kei Hiraki,
"Scalable Parallel Processing System Prototype : OCHANOMIZ 5,"
IPSJ SIG Technical Reports, ARC, Vol.95, No.80, pp.25-32, 1995. (In Japanese)
- Kiyofumi Tanaka, Jun Tsuiki, Takashi Matsumoto, Kei Hiraki,
"Reconfigurable High Functional Network of General Purpose Parallel Computer Prototype OCHANOMIZ-5,"
IEICE Technical Report, CPSY 95 - 48, Vol.95, No.209, pp.49-56, 1995. (In Japanese)